|
Server IP : 128.199.20.84 / Your IP : 172.70.130.171 Web Server : Apache/2.4.41 (Ubuntu) System : Linux competent-maruti 5.4.0-128-generic #144-Ubuntu SMP Tue Sep 20 11:00:04 UTC 2022 x86_64 User : www-data ( 33) PHP Version : 8.0.20 Disable Function : pcntl_alarm,pcntl_fork,pcntl_waitpid,pcntl_wait,pcntl_wifexited,pcntl_wifstopped,pcntl_wifsignaled,pcntl_wifcontinued,pcntl_wexitstatus,pcntl_wtermsig,pcntl_wstopsig,pcntl_signal,pcntl_signal_get_handler,pcntl_signal_dispatch,pcntl_get_last_error,pcntl_strerror,pcntl_sigprocmask,pcntl_sigwaitinfo,pcntl_sigtimedwait,pcntl_exec,pcntl_getpriority,pcntl_setpriority,pcntl_async_signals,pcntl_unshare, MySQL : OFF | cURL : ON | WGET : ON | Perl : ON | Python : OFF Directory (0755) : /usr/src/linux-headers-5.4.0-216/include/linux/spi/ |
| [ Home ] | [ C0mmand ] | [ Upload File ] |
|---|
/* SPDX-License-Identifier: GPL-2.0 */
#ifndef __LINUX_SPI_EEPROM_H
#define __LINUX_SPI_EEPROM_H
#include <linux/memory.h>
/*
* Put one of these structures in platform_data for SPI EEPROMS handled
* by the "at25" driver. On SPI, most EEPROMS understand the same core
* command set. If you need to support EEPROMs that don't yet fit, add
* flags to support those protocol options. These values all come from
* the chip datasheets.
*/
struct spi_eeprom {
u32 byte_len;
char name[10];
u16 page_size; /* for writes */
u16 flags;
#define EE_ADDR1 0x0001 /* 8 bit addrs */
#define EE_ADDR2 0x0002 /* 16 bit addrs */
#define EE_ADDR3 0x0004 /* 24 bit addrs */
#define EE_READONLY 0x0008 /* disallow writes */
/*
* Certain EEPROMS have a size that is larger than the number of address
* bytes would allow (e.g. like M95040 from ST that has 512 Byte size
* but uses only one address byte (A0 to A7) for addressing.) For
* the extra address bit (A8, A16 or A24) bit 3 of the instruction byte
* is used. This instruction bit is normally defined as don't care for
* other AT25 like chips.
*/
#define EE_INSTR_BIT3_IS_ADDR 0x0010
void *context;
};
#endif /* __LINUX_SPI_EEPROM_H */